UART Core Operates with Xilinx Kintix-7 and Spartan 6 FPGAs 16550/16750 Compatible Core registers Baud rate generator to control transmit and receive Interrupt function to the host controller Intergrated FIFO buffer Handshake lines for control of external modem Parallel I/O interface into the core Works with multiple cores in FPGA Fully synthesizable, VHDL core ISE design tool support
StackableUSB ruggedizes USB, I2C, and SPI into compact form factors enabling the technology to move into harsh environments such as industrial control systems, mobile, hand-held, military, medical, and remote communications applications. Visit www.StackableUSB.org for more information on StackableUSB and its ability to increase throughput as technology advances. To shop the Micro/sys entire StackableUSB product line, click here.

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