SPI Master FPGA Core Operates with Xilinx Kintix-7 and Spartan 6 FPGAs SPI™ serial-bus compliant 1 to 256 addressable channels SPI and Parallel Data I/O supported with2 separate clock domains Programmable SPI bus clock, up to 50MHz Programmable SPI word size, 8 bit to 64 bit Full-duplex or half-duplex Parallel I/O interface into the core Works with multiple cores in FPGA Fully synthesizable, VHDL core ISE design tool support
StackableUSB ruggedizes USB, I2C, and SPI into compact form factors enabling the technology to move into harsh environments such as industrial control systems, mobile, hand-held, military, medical, and remote communications applications. Visit www.StackableUSB.org for more information on StackableUSB and its ability to increase throughput as technology advances. To shop the Micro/sys entire StackableUSB product line, click here.

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